COMPASS was the invisible engine that powered the most powerful supercomputers of the 1960s and 1970s, yet it remains largely unknown outside the narrow circle of computer historians. This macro assembly language family served as the foundational tool for Control Data Corporation's 3000 series and the legendary 60-bit CDC 6000 series, including the 7600 and Cyber 70 and 170 series mainframes. While the underlying hardware architectures varied wildly between these machines, the macro and conditional assembly facilities remained remarkably consistent, creating a unified programming environment across diverse systems. CDC's own operating systems were written almost entirely in COMPASS assembly language, meaning that the very software that ran the world's fastest computers was built by hand, instruction by instruction, using this specialized tool. The language was a classical two-pass assembler that generated a full listing showing both the source assembly code and the generated machine code in octal, a format that reflected the binary nature of the era's computing hardware.
The Dual Processor Divide
The CDC 6000 series introduced a revolutionary architecture that split the computer into two distinct processors, each with its own version of COMPASS. COMPASS CP served as the assembly language for the Central Processor, the unit responsible for running user programs and handling the heavy lifting of computation. In contrast, COMPASS PP was the assembly language for the Peripheral Processor, a simpler unit dedicated solely to running operating system code and managing input and output operations. This division of labor allowed the Central Processor to focus on complex calculations while the Peripheral Processor handled the tedious task of moving data between memory and external devices. The Peripheral Processor hardware was significantly simpler than its central counterpart, featuring an 18-bit A register, a 12-bit Program Address register, and a 12-bit Q register that was not visible to the programmer. It also included a 22-bit R register used to accomplish address relocation during central memory read and write instructions on Cyber 180 systems. No special job validation was required to assemble peripheral processor programs, but to be executed, such programs were required to be installed into the operating system via special system editing commands.The Register Architecture
The Central Processor hardware maintained 24 operational registers, a complex array named A0 to A7, X0 to X7, and B0 to B7, each serving a specific purpose in the machine's operation. Registers X0 to X7 were 60 bits long and were used to hold data, while registers B0 to B7 were 18 bits long and their major purpose was to hold either addresses or be used as indexing registers. A programming convention emerged where B1 or B7 often contained positive 1, simplifying many arithmetic operations. The A registers were also 18 bits long, and each A register paired with the corresponding X register to facilitate data movement. Whenever an address was set into any of A1 to A5 registers, the data at that memory location was loaded into the corresponding X register. Likewise, setting an address into one of A6 or A7 registers stored the data held in the corresponding X6 or X7 register to that memory location. However, A0 could be used to hold any address without affecting the contents of register X0, providing a unique flexibility in memory management. This intricate register system allowed programmers to write highly efficient code that took full advantage of the hardware's capabilities.